Name
Title | ||
|---|---|---|
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. |
Abstract | ||
|---|---|---|
While high-speed analog-to-digital converter (ADC) front-ends in serial link receivers enable flexible and powerful digital signal processing-based (DSP-based) equalization, the robustness and power consumption of these ADCs can limit overall receiver energy efficiency. This paper presents a 25 GS/s 6b 8-way time-interleaved multi-bit search ADC that employs a soft-decision selection algorithm to ... |
Year | DOI | Venue |
|---|---|---|
2017 | 10.1109/JSSC.2017.2689033 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Latches,Switches,Bandwidth,Receivers,Redundancy,Signal processing algorithms,Analog-digital conversion | Flight dynamics (spacecraft),Digital signal processing,Equalization (audio),Computer science,Selection algorithm,Electronic engineering,CMOS,Robustness (computer science),Bandwidth (signal processing),Successive approximation ADC | Journal |
Volume | Issue | ISSN |
52 | 8 | 0018-9200 |
Citations | PageRank | References |
1 | 0.36 | 11 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shengchang Cai | 1 | 20 | 5.28 |
| Ehsan Zhian Tabasy | 2 | 43 | 6.20 |
| Ayman Shafik | 3 | 71 | 9.73 |
| Shiva Kiran | 4 | 12 | 2.71 |
| Sebastian Hoyos | 5 | 234 | 29.24 |
| Samuel Palermo | 6 | 142 | 22.07 |