Name
Title | ||
|---|---|---|
A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE |
Abstract | ||
|---|---|---|
A PAM-4 ADC-based receiver employs a 32-way time-interleaved 6-bit 2-bit/stage loop-unrolled SAR ADC with a single capacitive reference DAC. Digital equalization complexity is reduced with a new PAM-4 DFE architecture that has a gate count comparable to an NRZ DFE, while simultaneously halving the critical path delay. A 3-tap FFE is embedded in the ADC using an additional non-binary DAC to improve the coverage of the 6-bit FFE coefficient space. This 3-tap embedded FFE and CTLE front-end partial equalization allows placement of the CDR's Mueller-Muller phase detector directly at the ADC output to avoid excessive loop delay. Fabricated in GP 65nm CMOS, the 32Gb/s receiver operates at a BER <; 10
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup>
with a 27 dB loss channel and <; 10
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-9</sup>
with a 30 dB loss channel without utilizing any transmit equalization. The complete ADC-based receiver achieves a power efficiency of 8.25pJ/bit, including all the front-end, ADC, and DSP power. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1109/CICC.2018.8357008 | 2018 IEEE Custom Integrated Circuits Conference (CICC) |
Keywords | Field | DocType |
single capacitive reference DAC,digital equalization complexity,PAM-4 DFE architecture,critical path delay,nonbinary DAC,partially-unrolled DFE,PAM-4 ADC,ADC-based PAM-4 receiver,32-way time-interleaved loop-unrolled SAR ADC,FFE coefficient space,3-tap embedded FFE,CTLE front-end partial equalization,CDR Mueller-Muller phase detector,GP CMOS,BER,size 65.0 nm,bit rate 32 Gbit/s,word length 6 bit,loss 27.0 dB,loss 30.0 dB | Logic gate,Digital signal processing,Gate count,Equalization (audio),Computer science,Communication channel,CMOS,Electronic engineering,Phase detector,Successive approximation ADC | Conference |
ISBN | Citations | PageRank |
978-1-5386-2484-5 | 1 | 0.48 |
References | Authors | |
6 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shiva Kiran | 1 | 12 | 2.71 |
| Shengchang Cai | 2 | 20 | 5.28 |
| Ying Luo | 3 | 3 | 0.85 |
| Sebastian Hoyos | 4 | 234 | 29.24 |
| Samuel Palermo | 5 | 142 | 22.07 |