Title
CASE: A reliability simulation tool for analog ICs
Abstract
With the evolution in the scale of integration in ICs, aging-related problems are becoming more important and, nowadays, solutions to cope with these issues are not yet mature enough, especially in the field of analog circuit simulation. CASE, the novel simulator presented in this paper, can evaluate the impact of reliability effects in analog circuits through a stochastic physic-based model. The implemented simulation flow is accurate and efficient in terms of CPU. The two main improvements over currently reported and commercial tools, is that the simulator can simultaneously take into account both time-zero and time-dependent variability, and that an adaptive method, to account for the strong link between biasing and stress, can improve the accuracy while keeping acceptable CPU times.
Year
DOI
Venue
2017
10.1109/SMACD.2017.7981588
2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
Keywords
Field
DocType
reliability,process variability,aging,simulation flow,analog ICs,BTI,HCI
Analogue electronics,Adaptive method,Electronic engineering,Computer-aided software engineering,Engineering,Reliability engineering,Biasing
Conference
ISSN
ISBN
Citations 
2575-4874
978-1-5090-5053-6
3
PageRank 
References 
Authors
0.57
4
8