| A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems | 3 | 0.43 | 2020 |
| Improving the reliability of SRAM-based PUFs in the presence of aging | 0 | 0.34 | 2020 |
| Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications | 0 | 0.34 | 2020 |
| Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits | 1 | 0.43 | 2020 |
| A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level | 1 | 0.43 | 2020 |
| Ready-To-Fabricate Rf Circuit Synthesis Using A Layout- And Variability-Aware Optimization-Based Methodology | 0 | 0.34 | 2020 |
| Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop | 4 | 0.54 | 2019 |
| A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI, and HCI. | 2 | 0.58 | 2019 |
| An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks | 1 | 0.48 | 2019 |
| TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level | 0 | 0.34 | 2019 |
| Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator | 0 | 0.34 | 2019 |
| A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits | 0 | 0.34 | 2019 |
| A New Time Efficient Methodology for the Massive Characterization of RTN in CMOS Devices | 0 | 0.34 | 2019 |
| Experimental Characterization of Time-Dependent Variability in Ring Oscillators | 0 | 0.34 | 2019 |
| CMOS Characterization and Compact Modelling for Circuit Reliability Simulation | 0 | 0.34 | 2018 |
| Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator. | 0 | 0.34 | 2018 |
| A Comparison of Automated RF Circuit Design Methodologies: Online Versus Offline Passive Component Design. | 0 | 0.34 | 2018 |
| Analysis of Body Bias and RTN-Induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology | 0 | 0.34 | 2018 |
| Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. | 1 | 0.37 | 2018 |
| CASE: A reliability simulation tool for analog ICs | 3 | 0.57 | 2017 |
| New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization | 1 | 0.36 | 2017 |
| A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging | 3 | 0.64 | 2017 |
| An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors. | 8 | 0.63 | 2017 |
| A Size-Adaptive Time-Step Algorithm For Accurate Simulation Of Aging In Analog Ics | 2 | 0.59 | 2017 |
| Systematic design of a voltage controlled oscillator using a layout-aware approach | 1 | 0.36 | 2017 |
| An inductor modeling and optimization toolbox for RF circuit design. | 5 | 0.45 | 2017 |
| Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks | 0 | 0.34 | 2017 |
| Including a stochastic model of aging in a reliability simulation flow | 3 | 0.48 | 2017 |
| TARS: A toolbox for statistical reliability modeling of CMOS devices | 2 | 0.61 | 2017 |
| Extending the frequency range of quasi-static electromagnetic solvers | 1 | 0.43 | 2017 |
| Reliability simulation for analog ICs: Goals, solutions, and challenges. | 6 | 1.21 | 2016 |
| Accurate synthesis of integrated RF passive components using surrogate models | 0 | 0.34 | 2016 |
| Frequency-dependent parameterized macromodeling of integrated inductors | 0 | 0.34 | 2016 |
| SIDe-O: A toolbox for surrogate inductor design and optimization | 0 | 0.34 | 2016 |
| Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniques. | 0 | 0.34 | 2016 |
| Design space exploration using hierarchical composition of performance models | 1 | 0.36 | 2015 |
| Physical vs. surrogate models of passive RF devices | 0 | 0.34 | 2015 |
| Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors | 7 | 0.63 | 2014 |
| Implementation issues in the hierarchical composition of performance models of analog circuits | 2 | 0.38 | 2014 |
| Single-Objective Optimization Methodology for the Design of RF Integrated Inductors. | 0 | 0.34 | 2014 |
| A wideband lumped-element model for arbitrarily shaped integrated inductors | 1 | 0.63 | 2013 |
| Layout-aware Pareto fronts of electronic circuits. | 3 | 0.40 | 2011 |
| Stopping Criteria In Evolutionary Algorithms For Multi-Objective Performance Optimization Of Integrated Inductors | 4 | 0.45 | 2010 |
| APS design alternatives in 0.18μm CMOS image sensor technology | 1 | 0.38 | 2009 |
| Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview | 0 | 0.34 | 2009 |
| A memetic approach to the automatic design of high-performance analog integrated circuits | 6 | 0.57 | 2009 |
| An Integrated Layout-Synthesis Approach for Analog ICs | 39 | 1.71 | 2008 |
| A Hierarchical Approach for the Symbolic Analysis of Large Analog Integrated Circuits | 4 | 0.81 | 2000 |
| A Programmable Imager for Very High Speed Cellular Signal Processing | 3 | 0.67 | 1999 |
| An accurate error control mechanism for simplification before generation algorithms | 0 | 0.34 | 1999 |
