Name
Title | ||
|---|---|---|
A Combined Arithmetic-High-Level Synthesis Solution to Deploy Partial Carry-Save Radix-8 Booth Multipliers in Datapaths. |
Abstract | ||
|---|---|---|
While partial carry-save adders are easily designed by splitting them into several fragments working in parallel, the design of partial carry-save multipliers is more challenging. Prior approaches have proposed several solutions based on the radix-4 Booth recoding. This technique makes it possible to diminish the height of a multiplier by half, this being the most widespread option when designing ... |
Year | DOI | Venue |
|---|---|---|
2019 | 10.1109/TCSI.2018.2866172 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Adders,Delays,Encoding,Proposals,Energy consumption,Computer architecture,Computer science | High-level synthesis,Arithmetic,Radix,Mathematics | Journal |
Volume | Issue | ISSN |
66 | 2 | 1549-8328 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alberto A. Del Barrio | 1 | 78 | 14.49 |
| Román Hermida | 2 | 89 | 15.34 |
| Seda Öǧrenci Memik | 3 | 488 | 42.57 |