Name
Abstract | ||
|---|---|---|
Safety-critical electronics components require thermal and electrical stress phases at the end of manufacturing test to screen weak devices. It is possible to optimize the stress induced during the screening phase of Burn-In by running in parallel different types of stress procedures. In previous works, stress procedures of CPU, RAM memory and FLASH memory have been interleaved using DMA and leveraging on instruction CACHE memory. This paper presents a novel approach for optimizing stress procedures at CPU level using an Evolutionary Algorithm. The evolutionary-based framework improves the stress of the CPU procedure when it runs in presence of a parallel stress schema. The manuscript also reports the results gathered by exploiting the evolutionary strategy in a device used in common automotive systems. |
Year | DOI | Venue |
|---|---|---|
2018 | 10.1166/jolpe.2018.1542 | JOURNAL OF LOW POWER ELECTRONICS |
Keywords | Field | DocType |
Electrical Stress, Functional Stress Programs, Stress Coverage, Switching Activity, Evolutionary Algorithm | Industrial engineering,Evolutionary algorithm,Burn-in,Electronic engineering,Engineering | Journal |
Volume | Issue | ISSN |
14 | 1 | 1546-1998 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
11 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Davide Appello | 1 | 37 | 8.48 |
| Paolo Bernardi | 2 | 244 | 30.63 |
| Conrad Bugeja | 3 | 1 | 1.06 |
| Riccardo Cantoro | 4 | 99 | 18.20 |
| Andrea Colazzo | 5 | 0 | 0.34 |
| Alessandro Motta | 6 | 1 | 0.70 |
| A. Pagani | 7 | 3 | 1.80 |
| Giorgio Pollaccia | 8 | 1 | 1.06 |
| Marco Restifo | 9 | 6 | 3.31 |
| Ernesto Sánchez | 10 | 123 | 16.56 |
| Federico Venini | 11 | 1 | 1.06 |