Title | ||
---|---|---|
An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators. |
Abstract | ||
---|---|---|
A small-gate-count 8 bit bidirectional phase-domain MAC (PMAC) circuit is proposed to minimize both area and energy consumption of extremely energy-efficient deep neural network (DNN) accelerators, targeting the Internet-of-Things (IoT) edge devices operating with very strict power budgets (e.g., energy harvesting). PMAC consumes significantly less energy than standard fully digital MACs, due to i... |
Year | DOI | Venue |
---|---|---|
2019 | 10.1109/JSSC.2019.2926649 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Computer architecture,Random access memory,Switches,Logic gates,Oscillators,Energy consumption,Neurons | Electrical efficiency,PMAC,Efficient energy use,Computer science,8-bit,Energy harvesting,Electronic engineering,CMOS,Quantization (signal processing),Energy consumption | Journal |
Volume | Issue | ISSN |
54 | 10 | 0018-9200 |
Citations | PageRank | References |
2 | 0.38 | 0 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Yosuke Toyama | 1 | 2 | 0.71 |
Kentaro Yoshioka | 2 | 54 | 9.04 |
Koichiro Ban | 3 | 43 | 7.32 |
Shigeru Maya | 4 | 4 | 0.79 |
Akihide Sai | 5 | 20 | 8.25 |
Kohei Onizuka | 6 | 12 | 3.64 |