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TAKAHIRO IIZUKA
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Name
Affiliation
Papers
TAKAHIRO IIZUKA
Semicond Technol Acad Res Ctr, Yokohama, Kanagawa 2220033, Japan
11
Collaborators
Citations
PageRank
44
2
3.79
Referers
Referees
References
3
17
3
Publications (11 rows)
Collaborators (44 rows)
Referers (3 rows)
Referees (17 rows)
Title
Citations
PageRank
Year
History Effect on Circuit Performance of SOI-MOSFETs
0
0.34
2020
Modeling of Short-Channel Effect on Multi-Gate MOSFETs for Circuit Simulation
0
0.34
2020
Prevention Of Highly Power-Efficient Circuits Due To Short-Channel Effects In Mosfets
0
0.34
2019
Validation on Duality in Impact-ionization Carrier Generation at the Onset of Snapback in Power MOSFETs
0
0.34
2019
Compact Modeling for Power Efficient Circuit Design
0
0.34
2018
Modeling of Trench-Gate Type HV-MOSFETs for Circuit Simulation.
0
0.34
2013
Modeling Of Nbti Stress Induced Hole-Trapping And Interface-State-Generation Mechanisms Under A Wide Range Of Bias Conditions
2
0.41
2013
Compact Modeling Of Expansion Effects In Ldmos
0
0.34
2012
Degraded Frequency-Tuning Range And Oscillation Amplitude Of Lc-Vcos Due To The Nonquasi-Static Effect In Mos Varactors
0
0.34
2009
Non-quasi-static carrier dynamics of MOSFETs under low-voltage operation
0
0.34
2009
Non-Quasi-Static Carrier Dynamics Of Mosfets Under Low-Voltage Operation
0
0.34
2009
1