Kotb Jabeur - Citegraph

Author Info

Name	Affiliation	Papers
KOTB JABEUR	Lyon Institute of Nanotechnology University of Lyon, Ecole Centrale de Lyon, F-69134 Ecully, France	17
Collaborators	Citations	PageRank
64	33	7.43
Referers	Referees	References
106	279	129

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100279

Publications (17 rows)

Collaborators (64 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Using Multifunctional Standardized Stack As Universal Spintronic Technology For Iot	1	0.35	2018
GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack	1	0.40	2017
Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing.	11	1.06	2016
Reducing System Power Consumption Using Check-Pointing on Nonvolatile Embedded Magnetic Random Access Memories.	2	0.39	2016
Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse	0	0.34	2015
Hybrid STT/CMOS Design of an Interrupt Based Instant On/Off Mechanism for Low-Power SoC	2	0.37	2015
Low-power hybrid STT/CMOS system-on-chip embedding non-volatile magnetic memory blocks	1	0.36	2015
Hybrid CMOS/magnetic Process Design Kit and SOT-based non-volatile standard cell architectures	0	0.34	2014
Ambipolar independent double gate FET logic	2	0.47	2012
Ambipolar double-gate FETs for the design of compact logic structures	0	0.34	2012
Ambipolar double gate CNTFETs based reconfigurable logic cells	0	0.34	2012
Low-power design technique with ambipolar double gate devices	0	0.34	2012
Multi-objective mapping for matrix-based nanocomputer architectures	0	0.34	2011
High performance 4:1 multiplexer with ambipolar double-gate FETs	2	0.47	2011
Fine-grain reconfigurable logic cells based on double-gate CNTFETs	10	0.84	2011
Logic cells and interconnect strategies for nanoscale reconfigurable computing fabrics.	1	0.36	2010
Emerging Technologies and Nanoscale Computing Fabrics.	0	0.34	2009

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