Y. Rey-Tauriac - Citegraph

Author Info

Name	Affiliation	Papers
Y. REY-TAURIAC	Groupe de Microélectronique et Visualisation UPRESA 6076, Université de Rennes Cedex, France	7
Collaborators	Citations	PageRank
15	2	2.65
Referers	Referees	References
7	6	1

Publications (7 rows)

Collaborators (15 rows)

Referers (7 rows)

Referees (6 rows)

Title	Citations	PageRank	Year
Degradation mechanism understanding of NLDEMOS SOI in RF applications	1	0.48	2007
Hot-carrier reliability of 20V MOS transistors in 0.13 mum CMOS technology	0	0.34	2005
Robustness improvement of VDMOS transistors in Bipolar/CMOS/DMOS technology	0	0.34	2003
Reliability improvement of high value doped polysilicon-based resistors	0	0.34	2002
High reliability power VDMOS Transistors in Bipolar/CMOS/DMOS technology.	1	0.48	2001
Polysilicon oxide quality optimization at Wafer level of a Bipolar/CMOS/DMOS technology	0	0.34	2001
Wafer Level Accelerated test for ionic contamination control on VDMOS transistors in Bipolar/CMOS/DMOS	0	0.34	2001

1