A 1-MS/s to 1-GS/s Ringamp-Based Pipelined ADC With Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16 nm | 2 | 0.37 | 2021 |
A Compact 8-bit, 8 GS/s 8×TI SAR ADC in 16nm with 45dB SNDR and 5 GHz ERBW | 0 | 0.34 | 2021 |
Asynchronous Event-Driven Clocking and Control in Pipelined ADCs | 1 | 0.35 | 2021 |
A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS | 2 | 0.42 | 2021 |
A Redundancy-Based Background Calibration for Comparator Offset/Threshold and DAC Gain in a Ping-Pong SAR ADC | 0 | 0.34 | 2021 |
A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion | 2 | 0.39 | 2021 |
A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm | 0 | 0.34 | 2020 |
3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion | 1 | 0.35 | 2019 |
3.6 A 6-to-600MS/s Fully Dynamic Ringamp Pipelined ADC with Asynchronous Event-Driven Clocking in 16nm | 0 | 0.34 | 2019 |
A 2×14bit digital transmitter with memoryless current unit cells and integrated AM/PM calibration. | 0 | 0.34 | 2017 |
A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer | 0 | 0.34 | 2009 |