Author Info
Name
Affiliation
Papers
KANG-DEOG SUH
Memory Design Team, Samsung Electron. Co Ltd., Kyungki-Do, South Korea
11
Collaborators
Citations 
PageRank 
67
56
22.19
Referers 
Referees 
References 
298
85
9
Search Limit
100298
Title
Citations
PageRank
Year
Dynamic Vpass Controlled Program Scheme and Optimized Erase Vth Control for High Program Inhibition in MLC NAND Flash Memories.10.362010
Boosted Bit Line Program Scheme For Low Operating Voltage Mlc Nand Flash Memory00.342010
A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications52.312003
High-Performance 1-Gb Nand Flash Memory With 0.12-Mu M Technology31.232002
A dual-mode NAND flash memory: 1-Gb multilevel and high-performance 512-Mb single-level modes215.062001
A 0.4-/spl mu/#x03BC;m 3.3-V 1T1C 4-Mb nonvolatile ferroelectric RAM with fixed bitline reference voltage scheme and data protection circuit10.432000
A 3.3-V, 4-Mb nonvolatile ferroelectric RAM with selectively driven double-pulsed plate read/write-back scheme41.802000
An 8-Bit-Resolution, 360-Mu S Write Time Nonvolatile Analog Memory Based On Differentially Balanced Constant-Tunneling-Current Scheme (Dbcs)64.001998
An 8-bit-resolution, 360-μs write time nonvolatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS)10.761998
A 3.3-V single power supply 16-Mb nonvolatile virtual DRAM using a NAND flash memory technology00.341997
A 117-mm/sup 2/ 3.3-V only 128-Mb multilevel NAND flash memory for mass storage applications145.581996