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JAEIL LIM
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Name
Affiliation
Papers
JAEIL LIM
Yonsei Univ, Sch Elect & Elect Engn, Seoul 120749, South Korea
10
Collaborators
Citations
PageRank
7
10
3.69
Referers
Referees
References
38
247
84
Search Limit
100
247
Publications (10 rows)
Collaborators (7 rows)
Referers (38 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Thermal Aware Test Scheduling for NTV Circuit.
2
0.49
2018
Reconfigurable Scan Architecture For Test Power And Data Volume Reduction
0
0.34
2017
A Novel X-Filling Method For Capture Power Reduction
0
0.34
2017
A selective error data capture method using on-chip DRAM for silicon debug of multi-core design
0
0.34
2017
Process Variation-Aware Bridge Fault Analysis
0
0.34
2016
Lifetime Reliability Enhancement of Microprocessors: Mitigating the Impact of Negative Bias Temperature Instability
4
0.41
2015
3D Stacked DRAM Refresh Management with Guaranteed Data Reliability
1
0.34
2015
Recovery-Enhancing Task Scheduling For Multicore Processors Under Nbti Impact
0
0.34
2014
Dynamic Thermal Management For 3d Multicore Processors Under Process Variations
0
0.34
2013
Thermal-Aware Dynamic Voltage Frequency Scaling For Many-Core Processors Under Process Variations
3
0.42
2013
1