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PASCAL ANDREAS MEINERZHAGEN
Author Info
Open Visualization
Name
Affiliation
Papers
PASCAL ANDREAS MEINERZHAGEN
EPFL, Lausanne, Switzerland
10
Collaborators
Citations
PageRank
24
42
5.25
Referers
Referees
References
89
160
57
Search Limit
100
160
Publications (10 rows)
Collaborators (24 rows)
Referers (89 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Single-Supply 3T Gain-Cell for Low-Voltage Low-Power Applications
6
0.59
2016
Refresh-Free Dynamic Standard-Cell Based Memories: Application To A Qc-Ldpc Decoder
3
0.43
2015
Controlled placement of standard cell memory arrays for high density and low power in 28nm FD-SOI
7
0.54
2015
Replica Technique for Adaptive Refresh Timing of Gain-Cell-Embedded DRAM.
11
0.77
2014
An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing.
0
0.34
2012
A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS
8
0.86
2012
Replica bit-line technique for embedded multilevel gain-cell DRAM
2
0.44
2012
Synthesis strategies for sub-VT systems
4
0.58
2011
Design and failure analysis of logic-compatible multilevel gain-cell-based dram for fault-tolerant VLSI systems
1
0.37
2011
Benchmarking of Standard-Cell Based Memories in the Sub- VT Domain in 65-nm CMOS Technology.
0
0.34
2011
1