Aporva Amarnath - Citegraph

Author Info

Name	Affiliation	Papers
APORVA AMARNATH	University of Michigan, Ann Arbor, MI	13
Collaborators	Citations	PageRank
67	39	5.18
Referers	Referees	References
184	146	37

Search Limit

100184

Publications (13 rows)

Collaborators (67 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
A Holistic Solution for Reliability of 3D Parallel Systems	0	0.34	2022
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors	1	0.40	2021
Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles	0	0.34	2021
SparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator	1	0.35	2021
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator.	2	0.37	2020
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration	4	0.41	2020
Sparse-TPU: adapting systolic arrays for sparse matrices	5	0.48	2020
R2d3: A Reliability Engine For 3d Parallel Systems	0	0.34	2020
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm	0	0.34	2019
3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology	0	0.34	2019
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS	0	0.34	2019
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator	17	0.55	2018
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips.	9	0.59	2018

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