Abstract | ||
---|---|---|
Negative Capacitance Field-Effect Transistors (NCFET) are promising significant power reductions while maintaining performance due to their internal voltage amplification. However, the addition of the ferroelectric layer also introduces a higher gate capacitance, which has to be charged and discharged resulting in higher power consumption. This results in trade-offs when employing NC-FinFET with r... |
Year | DOI | Venue |
---|---|---|
2021 | 10.1109/VTS50974.2021.9441053 | 2021 IEEE 39th VLSI Test Symposium (VTS) |
Keywords | DocType | ISSN |
Measurement,Power demand,Very large scale integration,SRAM cells,Capacitance,Reliability engineering,Delays | Conference | 1093-0167 |
ISBN | Citations | PageRank |
978-1-6654-1949-9 | 0 | 0.34 |
References | Authors | |
0 | 5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Victor M. van Santen | 1 | 73 | 8.95 |
Simon Thomann | 2 | 5 | 2.20 |
Yogesh S. Chauchan | 3 | 0 | 0.34 |
Jörg Henkel | 4 | 13 | 8.46 |
Hussam Amrouch | 5 | 251 | 50.22 |