| Model-based systems engineering for life-sciences instrumentation development: PATOU et al. | 1 | 0.35 | 2019 |
| Design-for-Testability of On-Chip Control in mVLSI Biochips | 0 | 0.34 | 2019 |
| Scheduling and Fluid Routing for Flow-Based Microfluidic Laboratories-on-a-Chip. | 3 | 0.42 | 2018 |
| Report on DATE 2018 in Dresden, Germany. | 0 | 0.34 | 2018 |
| Taming Living Logic Using Formal Methods. | 0 | 0.34 | 2017 |
| Logic analysis and verification of n-input genetic logic circuits. | 0 | 0.34 | 2017 |
| Test-driven modeling and development of cloud-enabled cyber-physical smart systems. | 0 | 0.34 | 2017 |
| D-VASim - An Interactive Virtual Laboratory Environment for the Simulation and Analysis of Genetic Circuits. | 1 | 0.37 | 2017 |
| Synthesis of on-chip control circuits for mVLSI biochips. | 0 | 0.34 | 2017 |
| Synthesis of Application-Specific Fault-Tolerant Digital Microfluidic Biochip Architectures. | 1 | 0.36 | 2016 |
| Test-driven modeling of embedded systems | 0 | 0.34 | 2015 |
| Redundancy optimization for error recovery in digital microfluidic biochips | 9 | 0.67 | 2015 |
| A Smart Mobile Lab-on-Chip-Based Medical Diagnostics System Architecture Designed for Evolvability | 0 | 0.34 | 2015 |
| System-level synthesis of multi-ASIP platforms using an uncertainty model | 0 | 0.34 | 2015 |
| Control synthesis for the flow-based microfluidic large-scale integration biochips | 17 | 1.22 | 2013 |
| Module-Based Synthesis of Digital Microfluidic Biochips with Droplet-Aware Operation Execution | 12 | 0.67 | 2013 |
| Multi-ASIP platform synthesis for Event-Triggered applications with cost/performance trade-offs. | 1 | 0.36 | 2013 |
| Application-specific fault-tolerant architecture synthesis for digital microfluidic biochips | 4 | 0.45 | 2013 |
| ASAM: Automatic Architecture Synthesis and Application Mapping | 6 | 0.72 | 2012 |
| Routing-based synthesis of digital microfluidic biochips | 18 | 0.87 | 2012 |
| Robust and flexible mapping for real-time distributed applications during the early design phases | 2 | 0.39 | 2012 |
| Mdm: A Mode Diagrammodeling Framework For Periodic Control Systems | 2 | 0.40 | 2012 |
| Architectural synthesis of flow-based microfluidic large-scale integration biochips | 28 | 2.25 | 2012 |
| Biochips: The integrated circuit of biology | 0 | 0.34 | 2012 |
| Expressing Coarse-Grain Dependencies Among Tasks in Shared Memory Programs | 1 | 0.36 | 2011 |
| Energy/reliability trade-offs in fault-tolerant event-triggered distributed embedded systems | 6 | 0.48 | 2011 |
| System-level modeling and synthesis of flow-based microfluidic biochips | 24 | 3.00 | 2011 |
| Feasibility study of a self-healing hardware platform | 4 | 0.53 | 2010 |
| Tabu search-based synthesis of digital microfluidic biochips with dynamically reconfigurable non-rectangular devices | 17 | 0.91 | 2010 |
| Routing-Based Synthesis Of Digital Microfluidic Biochips | 0 | 0.34 | 2010 |
| Behavioral Synthesis of Asynchronous Circuits Using Syntax Directed Translation as Backend | 7 | 0.69 | 2009 |
| Identifying Inter-task Communication in Shared Memory Programming Models | 2 | 0.37 | 2009 |
| eDNA: A Bio-Inspired Reconfigurable Hardware Cell Architecture Supporting Self-organisation and Self-healing | 7 | 0.62 | 2009 |
| Models and formal verification of multiprocessor system-on-chips | 16 | 0.75 | 2008 |
| A service based estimation method for MPSoC performance modelling | 1 | 0.37 | 2008 |
| A Reactive and Cycle-True IP Emulator for MPSoC Exploration | 5 | 0.58 | 2008 |
| COSMOS: A System-Level Modelling and Simulation Framework for Coprocessor-Coupled Reconfigurable Systems | 1 | 0.34 | 2007 |
| ARTS: A SystemC-based framework for multiprocessor Systems-on-Chip modelling. | 12 | 0.73 | 2007 |
| Mt-ADRES: multithreading on coarse-grained reconfigurable architecture | 14 | 0.69 | 2007 |
| Semantics and verification of a language for modelling hardware architectures | 3 | 0.36 | 2007 |
| Multi-Objective Design Space Exploration of Embedded System Platforms | 13 | 0.69 | 2006 |
| ARTS: A System-Level Framework for Modeling MPSoC Components and Analysis of their Causality | 19 | 1.16 | 2005 |
| Power Constrained High-Level Synthesis of Battery Powered Digital Systems | 0 | 0.34 | 2003 |
| Network-on-Chip Modeling for System-Level Multiprocessor Simulation | 14 | 1.49 | 2003 |
| A Sophomore Course in Codesign | 4 | 0.80 | 2002 |
| Embedded systems education for the future | 43 | 8.43 | 2000 |
| Embedded system synthesis under memory constraints | 7 | 0.72 | 1999 |
| Integrating communication protocol selection with hardware/software codesign | 35 | 3.77 | 1999 |
| Graph based communication analysis for hardware/software codesign | 3 | 0.43 | 1999 |
| Communication estimation for hardware/software codesign | 15 | 1.38 | 1998 |
