Dagmar Peters-Drolshagen

Author Info

Name	Affiliation	Papers
DAGMAR PETERS-DROLSHAGEN	Univ Bremen, Inst Electrodynam & Microelect ITEM me, D-28359 Bremen, Germany	31
Collaborators	Citations	PageRank
45	39	12.87
Referers	Referees	References
45	359	149

Search Limit

100359

Publications (31 rows)

Collaborators (45 rows)

Referers (45 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Parameter Extraction for a Simplified EKV-model in a 28nm FDSOI Technology	0	0.34	2020
Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and Aging	0	0.34	2019
A New Approach to Threshold Voltage Measurements of Transistors	0	0.34	2018
ReSeMBleD-Methods for Response Surface Model Behavioral Description	0	0.34	2018
Reliability-Aware Multi-Vth Domain Digital Design Assessment	0	0.34	2018
Design for reliability of generic sensor interface circuits.	0	0.34	2018
Multi-User Frame Synchronization in Wireless Networks with Sporadic User Activity	0	0.34	2017
Implications for a Wireless, External Device System to Study Electrocorticography.	1	0.63	2017
Variation- and degradation-aware stochastic behavioral modeling of analog circuit components	3	0.54	2017
Design and Verification of Analog CMOS Circuits Using the g m/I D-Method with Age-Dependent Degradation Effects.	0	0.34	2017
Behavioral modeling of a sensor interface circuit including various non-idealities	2	0.50	2017
Parametrisable digital design of a sphere decoder with high-level synthesis.	0	0.34	2017
Parameter identification for behavioral modeling of analog components including degradation	4	0.57	2016
Activity and Channel Estimation in Multi-User Wireless Sensor Networks	0	0.34	2016
Stochastic LUT-based reliability-aware design method for operation point dependent CMOS circuits	0	0.34	2016
Design And Verification Of Analog Cmos Circuits Using The Gm/I-D-Method With Age-Dependent Degradation Effects	0	0.34	2016
Rapid digital architecture design of orthogonal matching pursuit.	0	0.34	2016
Analysis of aging effects - From transistor to system level.	1	0.43	2016
Reliability-aware design method for CMOS circuits.	0	0.34	2016
Hardware-accelerated reconstruction of compressed neural signals based on inpainting	0	0.34	2016
Fast digital design space exploration with high-level synthesis: A case study with approximate conjugate gradient pursuit	0	0.34	2016
Degradation and temperature analysis of voltage-controlled ring oscillators for robust and reliable oscillator designs in a 65nm bulk CMOS process	2	0.40	2016
Variability-aware aging modeling for reliability analysis of an analog neural measurement system	0	0.34	2015
Optimum Operating Points of Transistors with minimal Aging-Aware Sensitivity	2	0.52	2015
NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits	4	0.60	2015
Structure reconstruction of correlated neural signals based on inpainting for brain monitoring	2	0.39	2015
An aging-aware transistor sizing tool regarding BTI and HCD degradation modes	2	0.45	2015
Exploiting correlation in neural signals for data compression	4	0.47	2014
Development of a fully implantable recording system for ECoG signals	6	0.65	2013
Reliability analysis for integrated circuit amplifiers used in neural measurement systems	2	0.48	2013
Joint compression of neural action potentials and local field potentials	4	0.50	2013