| Multi-Category Image Super-Resolution With Convolutional Neural Network And Multi-Task Learning | 0 | 0.34 | 2021 |
| A 35-Mv Supply Ring Oscillator Consisting Of Stacked Body Bias Inverters For Extremely Low-Voltage Lsis | 0 | 0.34 | 2021 |
| Improvement Of Luminance Isotropy For Convolutional Neural Networks-Based Image Super-Resolution | 0 | 0.34 | 2020 |
| An 11.8 Na Ultra-Low Power Active Diode Using A Hysteresis Common Gate Comparator For Low-Power Energy Harvesting Systems | 0 | 0.34 | 2020 |
| A Sub-1-Mu S Start-Up Time, Fully-Integrated 32-Mhz Relaxation Oscillator For Low-Power Intermittent Systems | 0 | 0.34 | 2018 |
| An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems | 0 | 0.34 | 2018 |
| Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices | 0 | 0.34 | 2018 |
| An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications. | 0 | 0.34 | 2017 |
| Multi-Channel Convolutional Neural Networks For Image Super-Resolution | 0 | 0.34 | 2017 |
| An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs. | 0 | 0.34 | 2017 |
| A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability. | 0 | 0.34 | 2016 |
| Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting. | 6 | 0.56 | 2016 |
| A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management | 0 | 0.34 | 2016 |
| A Highly Efficient Switched-Capacitor Voltage Boost Converter With Nano-Watt Mppt Controller For Low-Voltage Energy Harvesting | 0 | 0.34 | 2016 |
| Image super-resolution with multi-channel convolutional neural networks | 1 | 0.35 | 2016 |
| A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems | 0 | 0.34 | 2016 |
| A 0.19-V Minimum Input Low Energy Level Shifter For Extremely Low-Voltage Vlsis | 7 | 0.58 | 2015 |
| Energy-Efficient Aes Subbytes Transformation Circuit Using Asynchronous Circuits For Ultra-Low Voltage Operation | 0 | 0.34 | 2015 |
| An Energy-Efficient 24t Flip-Flop Consisting Of Standard Cmos Gates For Ultra-Low Power Digital Vlsis | 0 | 0.34 | 2015 |
| A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters | 4 | 0.55 | 2015 |
| A 32-Khz Real-Time Clock Oscillator With On-Chip Pvt Variation Compensation Circuit For Ultra-Low Power Mcus | 0 | 0.34 | 2015 |
| A Fully On-Chip, 6.66-Khz, 320-Na, 56 Ppm/Degrees C, Cmos Relaxation Oscillator With Pvt Variation Compensation Circuit | 1 | 0.40 | 2014 |
| A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs. | 32 | 2.69 | 2012 |
| A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator | 3 | 0.55 | 2012 |
| Robust Subthreshold Cmos Digital Circuit Design With On-Chip Adaptive Supply Voltage Scaling Technique | 1 | 0.40 | 2011 |
| A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder | 1 | 0.38 | 2011 |
| Subthreshold Sram With Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit | 0 | 0.34 | 2011 |
| A Wide Input Voltage Range Level Shifter Circuit For Extremely Low-Voltage Digital Lsis | 2 | 0.40 | 2011 |
| A 18.9-nA standby current comparator with adaptive bias current generator | 2 | 0.44 | 2011 |
| An Error Diagnosis Technique Based On Clustering Of Elements | 0 | 0.34 | 2010 |
| Super-resolution technique for thermography with dual-camera system | 1 | 0.39 | 2010 |
| An Error Diagnosis Technique Based On Location Sets To Rectify Subcircuits | 0 | 0.34 | 2009 |
| A Look-Ahead Active Body-Biasing Scheme For Soi-Sram With Dynamic V-Ddm Control | 0 | 0.34 | 2009 |
| Delayed-Abc Soi For Crosstalk Noise Repair | 1 | 0.48 | 2008 |
| Low Power Sram With Boost Driver Generating Pulsed Word Line Voltage For Sub-1v Operation | 6 | 0.86 | 2008 |
| Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM | 0 | 0.34 | 2007 |
| Charge Recycling In Mtcmos Circuits With Block Dividing | 0 | 0.34 | 2007 |
| Boosted Voltage Scheme With Active Body-Biasing Control On Pd-Soi For Ultra Low Voltage Operation | 1 | 0.38 | 2007 |
| Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM | 0 | 0.34 | 2007 |
| Dynamic Threshold Voltage Control For Dual Supply Voltage Scheme On Pd-Soi | 0 | 0.34 | 2006 |
| High performance CMOS circuit by using charge recycling active body-bias controlled SOI | 1 | 0.41 | 2006 |
| A Novel Power Gating Scheme With Charge Recycling | 5 | 0.57 | 2006 |
| An Evaluation of Triple Density Error Diffusion for Medical Monochrome LCDs | 1 | 0.41 | 2006 |
| Adaptive Arithmetic Coding For Image Prediction Errors | 4 | 0.50 | 2004 |
| A Technique For High-Speed Circuits On Soi Using Look-Ahead Type Active Body Bias Control | 1 | 0.44 | 2004 |
| Layered blind deconvolution with interband prediction | 1 | 0.36 | 2000 |
| A diagnosis method for single logic design errors in gate-level combinational circuits. | 0 | 0.34 | 1997 |
