Name
Affiliation
Papers
TRONG-YEN LEE
Natl Taipei Univ Technol, Grad Inst Comp & Commun, Taipei 106, Taiwan
51
Collaborators
Citations 
PageRank 
62
98
20.70
Referers 
Referees 
References 
212
749
471
Search Limit
100749
Title
Citations
PageRank
Year
Design of a FlexRay/Ethernet Gateway and Security Mechanism for In-Vehicle Networks.00.342020
Personalized ACC System for Smart Vehicles00.342019
A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks.00.342018
A low-area dynamic reconfigurable MDC FFT processor design.40.422016
Adaptive instruction codec architecture design for network-on-chip.00.342016
Power-Saving Dynamic Allocation Strategy For Clouding Server00.342015
Design of smart power-saving architecture for network on chip20.392014
Energy-saving LED control module for agent-based Micro-Grid systems00.342014
Design of Low-Complexity 4-Path Dynamic Reconfigurable MDC FFT Processor.00.342014
Low Complexity Digit-Serial Multiplier over GF(2^m) Using Karatsuba Technology10.352013
An Efficient Task Placement Method for Reconfigurable FPGA Systems40.422013
An Efficient Reconfigurable Architecture Design and Implementation of Image Contrast Enhancement Algorithm20.382012
Microcontroller based automatic parking system00.342012
Discharge-path-based antenna effect detection and fixing for X-architecture clock tree10.352012
Micro fuel cell power management circuit design for portable devices00.342012
Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration10.352011
Post-Routing Double-Via Insertion For X-Architecture Clock Tree Yield Improvement00.342011
The RF Circuit Design of Power and Data Contactless Transmission for ISO/IEC 14443-2 Type B.10.402011
Antenna Violation Avoidance/Fixing for X-clock routing00.342010
Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable Systems50.462010
Double-via insertion enhanced X-architecture clock routing for reliability10.362010
A Bisection-Based Power Reduction Design for CMOS Flash Analog-to-Digital converters00.342009
The Design of a Li-ion Battery Charger Based on Multimode LDO Technology20.772009
Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion00.342009
Layer Assignment Considering Manufacturability In X-Architecture Clock Tree00.342008
GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay00.342008
X-clock routing based on pattern matching50.462008
Zero-Skew Driven Buffered RLC Clock Tree Construction20.412007
Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems50.462007
Propagation Delay Minimization On Rlc-Based Bus With Repeater Insertion40.572006
Coupling Aware Rlc-Based Clock Routings For Crosstalk Minimization00.342006
Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction00.342006
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design00.342006
Reduction of RLC Tree Delay Using Bidirectional Buffer Repeater Insertion00.342006
A Single Chip Image Sensor Embedded Smooth Spatial Filter With A/D Conversion00.342006
A new low-power turbo decoder using HDA-DHDD stopping iteration30.452005
A new CCII-based pipelined analog to digital converter10.412005
SESAG: an object-oriented application framework for real-time systems00.342005
RCGES: Retargetable Code Generation for Embedded Systems00.342004
VERTAF: An Application Framework for the Design and Verification of Embedded Real-Time Software191.122004
Embedded software synthesis and prototyping20.412004
Quasi-Dynamic Scheduling for the Synthesis of Real-Time Embedded Software with Local and Global Deadlines50.432003
RESS: Real-Time Embedded Software Synthesis and Prototyping Methodology10.372003
Software Platform for Embedded Software Development20.422003
VERTAF: an object-oriented application framework for embedded real-time systems20.462002
Formal Synthesis and Code Generation of Real-Time Embedded Software using Time-Extended Quasi-Static Scheduling80.552002
TCN: Scalable Hierarchical Hypercubes10.372002
Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks50.472001
A Case Study In Hardware-Software Codesign Of Distributed Systems - Vehicle Parking Management System00.341999
ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems60.511998
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