Yuta Yamato - Citegraph

Author Info

Name	Affiliation	Papers
YUTA YAMATO	Nara Institute of Science and Technology, Ikoma, Japan	18
Collaborators	Citations	PageRank
26	138	9.45
Referers	Referees	References
248	243	265

Search Limit

100248

Publications (18 rows)

Collaborators (26 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
LCTI–SS: Low-Clock-Tree-Impact Scan Segmentation for Avoiding Shift Timing Failures in Scan Testing	1	0.36	2013
A Capture-Safety Checking Metric Based On Transition-Time-Relation For At-Speed Scan Testing	1	0.37	2013
A novel capture-safety checking method for multi-clock designs and accuracy evaluation with delay capture circuits.	1	0.35	2012
A fast and accurate per-cell dynamic IR-drop estimation method for at-speed scan test pattern validation	0	0.34	2012
Distribution-Controlled X-Identification For Effective Reduction Of Launch-Induced Ir-Drop In At-Speed Scan Testing	0	0.34	2011
SAT-based capture-power reduction for at-speed broadcast-scan-based test compression architectures	2	0.38	2011
A Novel Scan Segmentation Design Method For Avoiding Shift Timing Failure In Scan Testing	8	0.49	2011
Power-Aware Test Generation With Guaranteed Launch Safety For At-Speed Scan Testing	15	0.65	2011
A Ga-Based X-Filling For Reducing Launch Switching Activity Toward Specific Objectives In At-Speed Scan Testing	0	0.34	2011
A Study Of Capture-Safe Test Generation Flow For At-Speed Testing	0	0.34	2010
High Launch Switching Activity Reduction In At-Speed Scan Testing Using Ctx: A Clock-Gating-Based Test Relaxation And X-Filling Scheme	0	0.34	2010
A GA-Based Method for High-Quality X-Filling to Reduce Launch Switching Activity in At-speed Scan Testing	4	0.43	2009
A novel post-ATPG IR-drop reduction scheme for at-speed scan testing in broadcast-scan-based test compression environment	9	0.54	2009
Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification	16	0.80	2008
A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits	1	0.38	2008
A novel scheme to reduce power supply noise for high-quality at-speed scan testing	49	1.64	2007
A Highly-Guided X-Filling Method for Effective Low-Capture-Power Scan Test Generation	30	1.02	2006
A Per-Test Fault Diagnosis Method Based on the X-Fault Model	1	0.35	2006

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