Hiroaki Honjo - Citegraph

Author Info

Name	Affiliation	Papers
HIROAKI HONJO	NEC Corp Ltd, Green Platform Res Labs, Tsukuba, Ibaraki 3058501, Japan	12
Collaborators	Citations	PageRank
73	90	11.43
Referers	Referees	References
295	122	26

Search Limit

100295

Publications (12 rows)

Collaborators (73 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition	0	0.34	2021
Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage	0	0.34	2020
12.1 An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz	1	0.42	2019
A 47.14-$\Mu\Text{W}$ 200-Mhz Mos/Mtj-Hybrid Nonvolatile Microcontroller Unit Embedding Stt-Mram And Fpga For Iot Applications	0	0.34	2019
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction	12	0.65	2015
Fabrication of a 3000-6-input-LUTs embedded and block-level power-gated nonvolatile FPGA chip using p-MTJ-based logic-in-memory structure	8	0.51	2015
A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing	0	0.34	2014
10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications	29	1.81	2014
Fabrication Of A Magnetic Tunnel Junction-Based 240-Tile Nonvolatile Field-Programmable Gate Array Chip Skipping Wasted Write Operations For Greedy Power-Reduced Logic Applications	9	1.06	2013
1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times	13	0.79	2012
A 90nm 12ns 32Mb 2T1MTJ MRAM.	12	3.00	2009
MRAM Cell Technology for Over 500-MHz SoC	6	1.83	2007

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