Fast Adaptive Comparator Offset Calibration In Pipeline Adc With Self-Repairing Thermometer To Binary Encoder | 0 | 0.34 | 2019 |
Black-Box Calibration for ADCs With Hard Nonlinear Errors Using a Novel INL-Based Additive Code: A Pipeline ADC Case Study | 0 | 0.34 | 2017 |
Fast Background Calibration of Sampling Timing Skew in SHA-Less Pipeline ADCs. | 0 | 0.34 | 2017 |
On the limits of machine learning-based test: A calibrated mixed-signal system case study. | 0 | 0.34 | 2017 |
Cell-culture measurements using voltage oscillations | 1 | 0.41 | 2016 |
The Bio-Oscillator: A Circuit for Cell-Culture Assays | 7 | 1.09 | 2015 |
INL systematic reduced-test technique for Pipeline ADCs | 2 | 0.70 | 2014 |
Closed-loop simulation method for evaluation of static offset in discrete-time comparators | 0 | 0.34 | 2014 |
Analysis Of Process Variations' Impact On A 2.4 Ghz 90 Nm Cmos Lna | 0 | 0.34 | 2013 |
Analysis of steady-state common-mode response in differential LC-VCOs. | 0 | 0.34 | 2012 |
Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. | 0 | 0.34 | 2012 |
2.4-GHz single-ended input low-power low-voltage active front-end for ZigBee applications in 90 nm CMOS. | 3 | 0.61 | 2011 |
Analog Sinewave Signal Generators for Mixed-Signal Built-in Test Applications | 5 | 0.62 | 2011 |
Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures | 15 | 1.02 | 2011 |
Blind Adaptive Estimation of Integral Nonlinear Errors in ADCs Using Arbitrary Input Stimulus | 3 | 0.53 | 2011 |
On chopper effects in discrete-time ΣΔ modulators | 1 | 0.41 | 2010 |
Power optimization of CMOS programmable gain amplifiers with high dynamic range and common-mode feed-forward circuit. | 0 | 0.34 | 2010 |
(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems | 1 | 0.36 | 2010 |
On Chopper Effects in Discrete-Time SigmaDelta Modulators. | 0 | 0.34 | 2010 |
Low-cost signature test of RF blocks based on envelope response analysis | 2 | 0.43 | 2010 |
Design of a CMOS closed-loop system with applications to bio-impedance measurements | 4 | 0.64 | 2010 |
A BIST Solution for Frequency Domain Characterization of Analog Circuits | 2 | 0.43 | 2010 |
Design of A CMOS closed-loop system useful for bio-impedance measurements. | 0 | 0.34 | 2009 |
A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis | 4 | 0.44 | 2009 |
A CMOS bio-impedance measurement system | 2 | 0.53 | 2009 |
Low-Cost Digital Detection of Parametric Faults in Cascaded SigmaDelta Modulators. | 0 | 0.34 | 2009 |
Low-cost digital detection of parametric faults in cascaded ΣΔ modulators | 0 | 0.34 | 2009 |
A 1.2V 5.14mW quadrature frequency synthesizer in 90nm CMOS technology for 2.4GHz ZigBee applications. | 0 | 0.34 | 2008 |
Practical implementation of a network analyzer for analog BIST applications | 2 | 0.41 | 2008 |
A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model | 0 | 0.34 | 2008 |
Improved Background Algorithms for Pipeline ADC Full Calibration | 1 | 0.41 | 2007 |
Novel swapping technique for background calibration of capacitor mismatching in pipeline ADCS | 0 | 0.34 | 2007 |
A Sinewave Analyzer for Mixed-Signal BIST Applications in a 0.35µm Technology | 1 | 0.38 | 2006 |
Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs | 1 | 0.37 | 2006 |
Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST | 2 | 0.39 | 2005 |
Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs | 8 | 0.70 | 2004 |
A Digital Test for First-Order [Sigma-Delta] Modulators | 0 | 0.34 | 2004 |
Digital Background Gain Error Correction in Pipeline ADCs | 2 | 0.44 | 2004 |
A method for parameter extraction of analogue sine-wave signals for mixed-signal built-in-self-test applications | 2 | 0.59 | 2004 |
A Charge Correction Cell for FGMOS-Based Circuits | 0 | 0.34 | 2003 |
Oscillation-based test in bandpass oversampled A/D converters | 10 | 0.79 | 2003 |
Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages | 4 | 0.57 | 2003 |
Practical Oscillation-Based Test of Integrated Filters | 20 | 1.61 | 2002 |
Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell | 23 | 1.81 | 2002 |
A micropower log domain FGMOS filter | 0 | 0.34 | 2002 |
Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation | 1 | 0.37 | 2002 |
A Mixed-Signal Design Reuse Methodology Based on Parametric Behavioural Models with Non-Ideal Effects | 5 | 0.64 | 2002 |
Self-Testable Pipelined ADC with Low Hardware Overhead | 1 | 0.43 | 2001 |
A Low-Voltage Floating-Gate MOS Biquad | 0 | 0.34 | 2001 |
Structural testing of pipelined analog to digital converters | 9 | 1.06 | 2001 |