Diagnosis Methods for Gate Delay Faults with Various Amounts of Delays. | 0 | 0.34 | 2016 |
Design And Implementation Of Data Synchronization And Offline Capabilities In Native Mobile Apps | 0 | 0.34 | 2016 |
Diagnosis of Delay Faults Considering Hazards | 0 | 0.34 | 2015 |
Optimal Periods for Probing Convergence of Infinite-stage Dynamic Programmings on GPUs. | 0 | 0.34 | 2014 |
Test Generation For Delay Faults On Clock Lines Under Launch-On-Capture Test Environment | 0 | 0.34 | 2013 |
Intermittently Proving Dynamic Programming to Solve Infinite MDPs on GPUs | 0 | 0.34 | 2013 |
Diagnosis for Bridging Faults on Clock Lines | 0 | 0.34 | 2012 |
Fault simulation and test generation for clock delay faults | 10 | 1.05 | 2011 |
On Detecting Transition Faults in the Presence of Clock Delay Faults | 2 | 0.38 | 2011 |
Enhancement of Clock Delay Faults Testing | 2 | 0.46 | 2011 |
Addressing Defect Coverage Through Generating Test Vectors For Transistor Defects | 0 | 0.34 | 2009 |
Fault Simulation and Test Generation for Transistor Shorts Using Stuck-at Test Tools | 1 | 0.37 | 2008 |
Maximizing Stuck-Open Fault Coverage Using Stuck-At Test Vectors | 2 | 0.40 | 2008 |
Increasing Defect Coverage by Generating Test Vectors for Stuck-Open Faults | 7 | 0.64 | 2008 |
On Finding Don't Cares in Test Sequences for Sequential Circuits | 4 | 0.47 | 2006 |
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits | 9 | 0.74 | 2006 |
Generation Of Test Sequences With Low Power Dissipation For Sequential Circuits | 0 | 0.34 | 2004 |
A Method to Reduce Power Dissipation during Test for Sequential Circuits | 0 | 0.34 | 2002 |
Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits | 1 | 0.37 | 2002 |
Consideration of Task’s Deadline for Scheduling Method with Used Processors Limitation | 0 | 0.34 | 2001 |